Random publications of
C. Scott Ananian

Probably some overlap here with my projects page.

Technical Publications:

Published

Architectural and Compiler Support for Strongly Atomic Transactional Memory.
C. Scott Ananian. PhD Thesis, MIT Department of Electrical Engineering and Computer Science. June, 2007.
[pdf] Slides: [not yet online]
Unbounded Transactional Memory.
C. Scott Ananian, Krste Asanović, Bradley C. Kuszmaul, Charles E. Leiserson, and Sean Lie. IEEE Micro Special Issue: Top Picks from Computer Architecture Conferences, January/February 2006.
Efficient Object-Based Software Transactions.
C. Scott Ananian and Martin Rinard. Synchronization and Concurrency in Object-Oriented Languages (SCOOL), San Diego, CA, October 16, 2005.
[ps] [pdf] Slides: [pdf] [Open Office] [Flash] [HTML (hi-res)] [HTML (lo-res)]
Unbounded Transactional Memory.
C. Scott Ananian, Krste Asanović, Bradley C. Kuszmaul, Charles E. Leiserson, and Sean Lie. 11th International Symposium on High Performance Computer Architecture (HPCA-11), San Francisco, CA, February 2005.
[pdf] Slides: [pdf] [Open Office] Alternate presentation order: [pdf] [Open Office]
Language-Level Transactions.
C. Scott Ananian and Martin Rinard. Eighth Annual Workshop on High Performance Embedded Computing (HPEC '04), MIT Lincoln Laboratory, MA, September 2004.
[slides]
Data Size Optimizations for Java Programs.
C. Scott Ananian and Martin Rinard. Proceedings of the Joint Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES '03), San Diego, CA, June 2003.
[acm] [ps] [pdf] [slides] [notes] FCRC EAST: [slides] [notes]
Direct Addressed Caches for Reduced Power Consumption.
Emmett Witchel, Sam Larsen, C. Scott Ananian, and Krste Asanović. 34th International Symposium on Microarchitecture (MICRO-34), Austin, TX, December 2001.
[ps] [pdf]
The Static Single Information Form.
C. Scott Ananian. Master's Thesis, MIT Department of Electrical Engineering and Computer Science. September 3, 1999. MIT Laboratory for Computer Science Technical Report MIT-LCS-TR-801.
[ps] [pdf]

Unpublished

Language-level Non-blocking Software Transactions (in Java!)
Talk given at the Center for Reliable Software (CRS) retreat, May 3-5, 2004.
[slides] [notes]
Verifying Software Transactions.
December 9, 2003.
[slides]
Non-Blocking Synchronization and Object-Oriented Operating System Design.
(Area Exam.) October 17, 2003.
[ps] [pdf] [slides] [notes]
Size Optimizations for Java Programs.
(Presentation for Oral Qualifying Exam.) May 9, 2002.
[slides] [notes]
Perceptual Salience in English Reduplication.
May 2001.
[ps] [pdf]
Postvelar Harmonies: A Typological Odyssey.
With Andrew Nevins. March 2001.
[ps] [pdf]
Laryngeal Neutralization and Syllable Structure.
With Andrew Nevins. December 2000.
[ps] [pdf]
Static Single Information Form.
November 13, 1999.
[ps] [pdf]
Silicon C: A Hardware Backend for SUIF.
May, 1998.
[ps] [pdf]
Theseus: A Maze-Solving Robot.
With Greg Humphreys. Senior Independent Work at Princeton University. May 23, 1997.
[pdf]
Reconfigurable Cryptography: A Hardware Compiler for Cryptographic Applications.
May 12, 1997.
[ps] [pdf]
TigerSHARK: A Hardware Accelerated Ray-tracing Engine.
With Greg Humphreys. Junior Independent Work at Princeton University. May 14, 1996.
[pdf]
(A shorter version was published as the winner of a best student paper award: [pdf])

Incomplete

Transparency: Menomini. An examination of an inadequacy in the theory of targetted constraints.
March 5, 2001.
[ps] [pdf]
Software Atomic Transactions in FLEX.
September 25, 2000 -- October 5, 2000.
[ps] [pdf]
Turning Java into Hardware: Caffinated Compiler Construction.
September 8, 1998.
[ps] [pdf]