Driver chip: driver.vhdl

 

Library IEEE;
use IEEE.std_logic_1164.all;
use WORK.CRYPT_PACK.ALL;
use IEEE.std_logic_unsigned.all;

entity driver is -- Crypto machine pin-out
  port(        CRYPTCLOCK: in  STD_LOGIC; -- the results of the crypto computation.
        RESULTIN:   in  STD_LOGIC;
        RESULTOUT:  out STD_LOGIC;

        DATACLOCK:  in  STD_LOGIC;
        DATAIN:	    in  STD_LOGIC;
        DATAOUT:    out STD_LOGIC;

        RUN:	    in  STD_LOGIC);
end;

architecture BEHAVIOR of driver is
        signal key, nextkey:STD_LOGIC_VECTOR(63 downto 0);
        signal found, nextfound, cryptdone:STD_LOGIC;
        signal CLOCK:STD_LOGIC;
        signal CRYPTRESET:STD_LOGIC;
begin
  CLOCK <= CRYPTCLOCK when RUN = '1' else DATACLOCK;
  CRYPTRESET <= not RUN;

  MAINCLOCK: process
  begin
    wait until CLOCK'event and CLOCK = '1';
    if RUN = '0' then   -- process to perform serial i/o
      DATAOUT <= found;
      found   <= key(63);
      key     <= key(62 downto 0) & DATAIN;
    else                -- clock the computation
      if (cryptdone = '1') then
        found<= nextfound or found;
        if (found or nextfound) = '0' then
          key  <= nextkey;
        end if;
      end if;
    end if;
  end process;

  -- process to perform computation
  DOCRYPT: process(key, nextkey, found, nextfound)
    constant mask:BIT_VECTOR := X"8000_0000_0000_000D";
    variable temp:STD_LOGIC_VECTOR(63 downto 0);
  begin
    if key(0) = '0' then
      nextkey <= key(0) & key(63 downto 1);
    else
      temp := key xor To_StdLogicVector(mask);
      nextkey <= key(0) & temp(63 downto 1);
    end if;

  end process;

  CRYPT0: crypt
  port map (
      k0 => key(31 downto  0), -- lsb
      k1 => key(63 downto 32), -- msb
      RV0=> nextfound,
      CLOCK => CRYPTCLOCK,
      DONE=>cryptdone,
      RESET=>CRYPTRESET
  );

  -- external result flag
  RESULT: process(RESULTIN, found)
  begin
    RESULTOUT <= RESULTIN or found;
  end process;
end BEHAVIOR;