Library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_signed.all;
use WORK.CRYPT_PACK.ALL;
entity crypt is --Computational core
port( k0, k1: in INT32;
RV0: out STD_LOGIC;
CLOCK: in STD_LOGIC;
DONE: out STD_LOGIC;
RESET: in STD_LOGIC);
end;
architecture BEHAVIOR of crypt is
-- register definitions
signal t74,t171:INT32;
signal t80,t170:INT32;
signal t132,t175:INT32;
signal t59,t173:INT32;
signal t144,t174:INT32;
signal t68,t172:INT32;
-- state definitions
signal State2, nextState2:BIT;
signal State0, nextState0:BIT;
signal State1, nextState1:BIT;
begin
CLOCKSTATE: process
begin
wait until (CLOCK'event) and (CLOCK='1');
-- new state:
State2 <= nextState2;
State0 <= nextState0;
State1 <= nextState1;
-- new registers:
t74 <= t171;
t80 <= t170;
t132 <= t175;
t59 <= t173;
t144 <= t174;
t68 <= t172;
end process;
NEXTSTATE: process(k0,k1,
State2,
State0,
State1,
t74,
t80,
t132,
t59,
t144,
t68,
RESET)
variable t105:INT32;
variable t97:INT32;
variable t100:INT32;
variable t158:INT32;
variable t92:INT32;
variable t118:INT32;
variable t154:INT32;
variable t159:INT32;
variable t119:INT32;
variable t101:INT32;
variable t114:INT32;
variable t93:INT32;
variable t161:INT32;
variable t106:INT32;
variable t120:INT32;
variable t110:INT32;
variable t102:INT32;
variable t98:INT32;
variable t94:INT32;
variable t90:INT32;
variable t121:INT32;
variable t111:INT32;
variable t103:INT32;
variable t155:INT32;
variable t112:INT32;
variable t115:INT32;
variable t104:INT32;
variable t107:INT32;
variable t99:INT32;
variable t91:INT32;
variable t95:INT32;
variable RV:INT32;
variable t116:INT32;
variable t108:INT32;
variable t96:INT32;
variable t117:INT32;
variable t113:INT32;
variable t109:INT32;
begin
DONE <= '0';
RV0 <= '0';
-- default state:
nextState2 <= '0';
nextState0 <= '0';
nextState1 <= '0';
-- default registers:
t171 <= t74;
t170 <= t80;
t175 <= t132;
t173 <= t59;
t174 <= t144;
t172 <= t68;
if RESET = '1' then
nextState1 <= '1';
-- STATE MACHINE
elsif State2 = '1' then
t154 := t144; -- move
t155 := t132; -- move
if
t154 = To_INT32(45)
then
if
t155 = To_INT32(56)
then
t158 := To_INT32(1); -- phi2
t159 := t158; -- move
t161 := t159; -- phi2
else
t158 := To_INT32(0); -- phi2
t159 := t158; -- move
t161 := t159; -- phi2
end if;
else
t161 := To_INT32(0); -- phi2
end if;
RV := t161; -- move
nextState1 <= '1';
DONE <= '1';
if RV=0 then RV0<='0'; else RV0<='1'; end if;
elsif State0 = '1' then
t90 := t68; -- move
t91 := SHL(t80, To_INT32(4));
t92 := t91; -- move
t93 := k0; -- ARG
t94 := t92 + t93;
t95 := t94; -- move
t96 := t80 + t59;
t97 := t95 xor t96;
t98 := t97; -- move
t99 := SHR(t80, To_INT32(5));
t100 := t99; -- move
t101 := k1; -- ARG
t102 := t100 + t101;
t103 := t98 xor t102;
t104 := t90 - t103;
t105 := t80; -- move
t106 := SHL(t104, To_INT32(4));
t107 := t106; -- move
t108 := k0; -- ARG
t109 := t107 + t108;
t110 := t109; -- move
t111 := t104 + t59;
t112 := t110 xor t111;
t113 := t112; -- move
t114 := SHR(t104, To_INT32(5));
t115 := t114; -- move
t116 := k1; -- ARG
t117 := t115 + t116;
t118 := t113 xor t117;
t119 := t105 - t118;
t120 := t59 - To_INT32(654329);
if
t74 < To_INT32(32)
then
t121 := t74 + To_INT32(1);
nextState0 <= '1'; -- goto
t170 <= t119; -- phi1
t171 <= t121; -- phi1
t172 <= t104; -- phi1
t173 <= t120; -- phi1
else
nextState2 <= '1'; -- goto
t174 <= t119; -- phi1
t175 <= t104; -- phi1
end if;
elsif State1 = '1' then
nextState0 <= '1'; -- goto
t170 <= To_INT32(12); -- phi1
t171 <= To_INT32(1); -- phi1
t172 <= To_INT32(23); -- phi1
t173 <= To_INT32(20938528); -- phi1
end if;
end process;
end;